This paper presents an overview of budget management
and its application to low-power CMOS design. Budget
management involves the incremental distribution of delay within
a circuit without violating timing constraints. In low-power applications,
the assigned budget can be used to reduce combinational
circuit area and power dissipation. The zero-slack algorithm for
slack assignment (ZSA) and the maximum-independent-set-based
algorithm (MISA) for budget management are discussed, while
a gate-sizing algorithm for low-power applications of budget
management is presented. In gate-sizing algorithms, the template
of a gate on a non-critical path is replaced by a smaller template,
thereby, reducing its power dissipation. In addition, ultra-low
power optimization techniques such as multi-threshold CMOS
and transistor stacks are introduced as potential low-power
applications for budget management.