Configure TIM3 to update at 44.1 kHz – see Chapter 10 to review how this is done.
Configure the TIM3 output trigger so that it occurs on update events:
Configure the NVIC to enable interrupt channel TIM3_IRQn with the highest priority (0 for both sub-priority and preemption priority) – see
Chapter 11 to see how this is done.
Change the trigger in the DAC initialization code:
Write a suitable interrupt handler.