All PIC® microcontrollers employ an advanced RISC
architecture. The PIC16F627A/628A/648A have
enhanced core features, an eight-level deep stack, and
multiple internal and external interrupt sources. The
separate instruction and data buses of the Harvard
architecture allow a 14-bit wide instruction word with
the separate 8-bit wide data. The two-stage instruction
pipeline allows all instructions to execute in a singlecycle,
except for program branches (which require two
cycles). A total of 35 instructions (reduced instruction
set) are available, complemented by a large register
set.