Dielectric chemical mechanical polishing (CMP) was implemented in semiconductor fabrication as a simple alternative planarization process for the interlevel dielectrics surface instead of the reactive ion etching process of the 1980s. Since then, there have been a growing number of applications of the dielectric CMP process in advanced semiconductor fabrication because of multiple “new” integration schemes (such as replacement metal gate (RMG), or self-aligned contact), which require advanced planarization technology. It is important to understand its history, material removal mechanism, defect formation, and present and future applications to comprehend why dielectric CMP has to be used, how the material is removed, and how the defect is created. By understanding what has been studied on the current dielectric CMP process, future applications of dielectric CMP can be further improved for better process performance and, therefore, for better device performance and yield