The Cortex-M3 core has 16 user-visible registers (illustrated in Figure
2.4) – all processing takes place in these registers. Three of these registers
have dedicated functions including the program counter (PC), which holds the
address of the next instruction to execute, the link register (LR), which holds
the address from which the current procedure was called, and “the” stack
pointer (SP) which holds the address of the current stack top (as we shall
discuss in Chapter 11, the CM3 supports multiple execution modes, each with
their own private stack pointer). Separately illustrated is a processor status
register (PSR) which is implicitly accessed by many instructions.
The Cortex-M3, like other ARM processors was designed to be programmed
(almost) entirely in higher-level language such as C. One consequence
is a well developed “procedure call standard” (often called an ABI or