Each SDCS is associated with a single-phase full-bridge inverter. The AC voltage terminals of inverters are connected in series. By different combinations of four switches, S1-S4, each inverter level can generate three different voltage outputs, i.e., +ViVdc, -ViVdc, and zero. The synthesized total AC voltage output waveform is the sum of the individual inverter voltage outputs. In this multi-level inverter topology, the number of output phase voltage levels is defined by m=2S+1, where S is the number of DC sources. An example of the phase voltage waveform for a nine-level cascaded inverter with four separated DC sources and four full-bridges is shown in Fig. 2. The phase voltage Van is the sum of each full-bridge output voltages and is equal to v1+v2+v3+v4.