The preceding description suggests the organization of a control unit shown in
Figure 16.10.This slightly revised version of Figure 16.4 emphasizes the focus of this
section.The major modules in this diagram should by now be clear.The sequencing
logic module contains the logic to perform the functions discussed in the preceding
section. It generates the address of the next microinstruction, using as inputs the instruction
register, ALU flags, the control address register (for incrementing), and
the control buffer register. The last may provide an actual address, control bits, or
both. The module is driven by a clock that determines the timing of the microinstruction
cycle.