2. BOBCAT C-STATE ARCHITECTURE
Three unique core power states (C-states) are supported by the
Bobcat x86 processor, including: core-C0 (CC0), core-C1 (CC1),
and core-C6 (CC6). CC0 is the normal operational state where
instructions are being executed, while CC1/CC6 are sleep states.
CC1 is a simple sleep state where the core is halted and the clock
ramped down to a lower frequency. CC6 is a “deep sleep” state
where internal core state is not retained. The CC6 state may be
entered from the CC1 state.