Fig. 4 displays the structure of buffer unit, moving
window and arithmetic unit (AU). The row pixels from the
memory unit are mapped into different registers in the buffer
unit to organize as one column by a multiplexor. The
constructed column move forward and shifts into the moving
window. The moving window acts as a FIFO. All pixels
from moving widow are loaded in the AU. In AU the
horizontal and vertical component of the values are
calculated.
The AU consisting of two's complements units and adders
to calculate the vertical and horizontal edges. The values are
computed in parallel units to achieve the higher speed.