[13] is also listed in Table II. It
can be computed that the proposed CNU can achieve the same
throughput, but only requires 19.5% of the RAM in the forward-
backward-based CNU in [13]. In addition, each memory
cell has the same area of an XOR and each register occupies three
times the area of an XOR. Accordingly, the overall area requirement
of the proposed CNU is only 22.5% of that of the forward-
backward-based CNU in [13].
The Min-max CNU architecture in [12] also employs the
forward-backward scheme. However, all