PA-RISC ISA
PA-RISC is Hewlett Packard’s RISC (Reduced Instruction Set Computing) architecture and an 1980s offspring from previous designs such as the FOCUS CPU. The aim was to replace 16-bit stack-based CPUs in HP 3000 servers and Motorola 680x0 CPUs in HP’s Unix systems, with a common system architecture.
Overall PA-RISC was a rather conservative RISC design:
The instruction set is implemented in hardware and not microcoded.
Instruction size is of fixed length — one word (32-bit).
Only three addressing modes: long/short displacement and indexed.
Only load/store operation access the memory, no computational instructions directly access it.
Many simple and frequently used instructions execute in just one cycle, more complex computation are assigned to assist processors or software algorithms.