Where =5pF, = 15pF and = 10pF, respectively, and the drain voltage ( ) is calculated as =4.5V. The value of gate voltage ( ) is obtained as 2.25V, which means the voltage at the common gate point ( ) will increase from 0V to constant voltage at 2.25V. From 74HC14 datasheet specification the voltage range at a high level (H) and low level (L) are 2.3V~ 3.15V and 1.13V~ 2.0V, respectively. Then the output voltage of CMOS inverter IC can be more stable than in normal case operation, as shown in figure 4.14.