The instruction–level simulation is not in fact a logic simulator at all, but rather a simple sequential simulation of a sequence of LC3 instructions .Our instruction–level simulation simply maintains a PC value, indexes a memory array at that value to obtain an instruction, extracts the four–bit opcode for the instruction, and changes the register and memory state as dictated by the instruction. Clearly, the performance of this approach will be considerably better than the detailed logic simulations above, since it is at a different level of abstraction. We used this simulation to show that the detailed simulations were in fact producing the same results as the abstract instruction–level simulator. In fact, the tools provided by Patt and Patel include a similar simulator, but it has several “features” not of interest for our experiments, such as a fancy graphical user interface and step–by–step instruction execution. Since the LC3 instruction set is so simple, the coding and debugging of our instruction–level simulation was relatively simple and took little time.