A clock supplies regular time signal pulses (Figure 1.38(b)) to
the analogue-to-digital converter and every time it receives a pulse it
samples the analogue signal. The result is a series of narrow pulses with
heights which vary in accord with the variation of the analogue signal
(Figure 1.38(c)). This sequence of pulses is changed into the signal form
shown in Figure 1.38(d) by each sampled value being held until the next
pulse occurs. This holding is necessary to allow time for the conversion
to take place at an analogue-to-digital converter. This converts each
sample into a sequence of pulses representing the value. For example,
the first sampled value might be represented by 101, the next sample by
011, etc. The 1 represents an 'on' or 'high' signal, the 0 an 'off' or 'low'
signal. Analogue-to-digital conversion thus involves a sample and hold
unit followed by an analogue- to-digital converter (Figure 1.39).