As a final example in this section, we will consider the design of a 2-bit up/down, cycling/saturating counter. This counter has two flip flops, A and B, and thus only four states. It has two control inputs, x and y. If x 0, it counts up and if x 1, it counts down. If y 0, it cycles, that is, goes 0 1 2 3 0 1 . . . or 3 2 1 0 3 2 . . . , and if y 1, it saturates, that is, it goes 0 1 2 3 3 3 . . . or 3 2 1 0 0 0 . . . . (This is a two-flip flop version of CE10.) The state table for this counter is
As a final example in this section, we will consider the design of a 2-bit up/down, cycling/saturating counter. This counter has two flip flops, A and B, and thus only four states. It has two control inputs, x and y. If x 0, it counts up and if x 1, it counts down. If y 0, it cycles, that is, goes 0 1 2 3 0 1 . . . or 3 2 1 0 3 2 . . . , and if y 1, it saturates, that is, it goes 0 1 2 3 3 3 . . . or 3 2 1 0 0 0 . . . . (This is a two-flip flop version of CE10.) The state table for this counter is
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