To ge nerate 211timi ng signals, we need either a shift register with 21t flip-flops or an ,,-bit binary
co unter toge ther with an n-to_21t•line decoder. For example, 16 timing signals can be generated
with a l6-bit shift register connected as a ring counter or with a a-bit binary coun ter and a 4-to-l 6line
decoder. in the first case. we need 16 flip-flops. In the second, we need four fbp-