After the PLL has locked, we are running in PLLx12/4 mode (since DIVSEL is /4). We can now enable the missing clock detect circuitry, and also change DIVSEL to /2. In this example, I will wait a bit of time to let inrush currents settle, and then change DIVSEL from /4 to /2. This is only an example. The amount of time you need to wait depends on the power supply feeding the DSP (i.e., how much voltage droop occurs due to the inrush currents, and how long it takes the