Niagara2’s total power consumption is 84 W @ 1.1 V and
1.4 GHz operation. The pie-chart in Fig. 21 shows the power
consumed by the various blocks inside Niagara2. Almost a
third of the total power is consumed by the eight SPARC
cores. L2 cache Data, Tag and Buffer blocks together account
for 20% of the total. SOC logic consumes 6% while I/Os
consume 13%. Leakage is about 21% of the total power. Clocks
to unused clusters are gated off to save dynamic power. Within units, clocks to groups of flops are separated into independent
domains depending upon the functionality of the corresponding
logic. Clocks to each domain can be turned off independently
of one another when the related logic is not processing valid
instructions. This saves dynamic power.