The channel input pin is synchronized to the internal system clock. Thus, pulses on the input pin must
have a minimum duration greater than the system clock period.
The content of the 16-bit capture register is read out from registers T1CCnH:T1CCnL.
When the capture takes place, the interrupt flag for the channel, T1STAT.CHnIF (n is the channel
number), is set. An interrupt request is generated if enabled, see Section 9.10 for details.