E. Physical Implementation
The chip has been fabricated in a CIS standard 1P4M
process (digital: 1.8 V transistors:, analog: 3.3 V transistors,
pinned photodiode, color filters and microlenses). The
microlenses layer was not used in this work. The chip area is
5mm×5mm. The analog parts of the chip are powered with
a 3.3 V source and digital parts with a 1.8 V. Fig. 10 shows
a chip micrograph locating the main design blocks. The VGA
pixels array meant for a front side illumination occupies
an area of 4.16mm×3.12mm. Standard PPDs were used in
the pixels array and the area between the even and odd