The TBCLKSYNC bit in the peripheral clock enable registers allows all users to globally synchronize all
enabled ePWM modules to the time-base clock (TBCLK). When set, all enabled ePWM module clocks are
started with the first rising edge of TBCLK aligned. For perfectly synchronized TBCLKs, the prescalers for
each ePWM module must be set identically.
The proper procedure for enabling ePWM clocks is as follows:
1. Enable ePWM module clocks in the PCLKCRx register
2. Set TBCLKSYNC= 0
3. Configure ePWM modules
4. Set TBCLKSYNC=1