within each set. Hence, a swapping has to be occurred when it
is cost-effective to evict a data block from SRAM lines if its
current STT-RAM container recently receives large writes.
Hardware support. The first issue to decide on is how to
detect write-intensive data blocks (currently forming WWS of
a set) based on which it should be placed in SRAM lines. It, in
first place, requires a mechanism to count writes in any line.
We use a saturating counter named Line Saturation Counter,
LSC (see Figure 2), to monitor and register the temporal
locality of recent writes within a set. The LSCs of a set
determines how recent writes were distributed based on which
write-stressed lines are selected (when saturated) and placed in
SRAM. Indeed, we hope future writes in a set will have a
similar behavior because of write access locality.