The analysis and simulation show that the drain envelope impedance is the most
important factor for reducing the memory effect and nonlinearity. A new matching
topology is proposed for minimizing the drain and gate envelope impedances. The
matching topology consists of a series LC circuit for shorting the device at a low
frequency while maintaining a matchable impedance at the operating frequency. The
circuits are connected to the gate and drain terminals, rather than to the bias lines,
since the circuit can produce a very low impedance, not limited by the quarter-
wavelength bias line. The amplifier, with the reduced envelope impedances, provides
drastically reduced memory effects and very linear amplification performance for
wideband signals.