It is usually preferable to obtain all the required gain in the first stage, leaving the second stage to
perform the task of taking the difference between the outputs of the first stage and thereby rejecting the
common-mode signal. In other words, the second stage is usually designed for a gain of 1. Adopting
this approach, we select all the second-stage resistors to be equal to a practically convenient value,
say 10 kΩ. The problem then reduces to designing the first stage to realize a gain adjustable over the
range of 2 to 1000. Implementing 2R1 as the series combination of a fixed resistor R1f and the variable
resistor R1v obtained using the 100-kΩ pot (Fig. 2.21), we can write