Medium- and high-voltage power MOSFETs are used in a variety of isolated converter topologies, such as half- or full-bridges
and single-ended boost and synchronous buck regulators. The bridges may be hard- or soft-switched; however, most of
today’s converters employ zero voltage switching (ZVS) to eliminate turn-on switching losses. The powertrain remains the same,
except the sequence in which devices are turned on and off needs to be modified. Synchronous buck converters, typically used
for front end pre-regulation in wide-input DC/DC brick converters, also switch the low-side MOSFET in ZVS mode. While the
hard switched bridges and boost converters do not have critical dead time requirements, all soft-switched ZVS bridges and
synchronous buck converters must operate within such limits. In low-voltage synchronous buck converters, the dead time
during the transitions between the low- and high-side MOSFETs is optimized by the controller or the driver. Shoot-through
protection is also implemented, either by sensing the falling edge of the gate drive or the switch node voltage. There are also
more sophisticated techniques that attempt to optimally adjust the delay on a continuous basis.
However, such fine tuning is not practical with higher-voltage drivers, so designers must fall back on fixed dead times during
transitions. Since long dead times lead to longer body diode conduction and a consequent loss of efficiency, it is always
desirable to provide an optimally minimized dead time without running into shoot-through conditions. This requires a detailed
understanding of the transition process and calculation of different intervals based on MOSFET and circuit parameters. While
optimum delays can be, and quite often are, determined empirically, analysis is necessary to account for variations and to
choose the right device for the highest efficiency. For an illustration of this analysis, in this article we will use a soft-switched full
bridge, which operates with a full duty ratio of 50 % per arm. Such a topology is also known as a DC transformer, and is popular
for generating an unregulated intermediate bus converter (IBC) output from a 48 VDC input. The concepts and parametric
tradeoffs discussed here can be extended to many other ZVS topologies as well.