Instruction Set Architecture (32- versus 64-bit)
The instruction set used by IBM PC compatible CPUs is called x86-32 or IA-32 (Intel Architecture). As described above, this has been extended with SIMD instructions and the way the instructions are processed internally has been modified and optimised by various different CPU architectures, but otherwise the same platform has been in use for last 30 years.
Up until a few years ago, CPUs were designed to run 32-bit code. This means that each instruction can be up to 32-bits in length. A 32-bit CPU's General Purpose(GP) registers are also 32-bits wide. However, since 2004, most desktop CPUs (and from 2006, most laptop CPUs) released to the market have been capable of running 64-bit code.
Intel first developed a 64-bit instruction set for its Itanium server CPU platform in 2011. This platform (IA-64) has never gained acceptance in the PC market however. AMD's 64-bit instruction set (AMD64) has proed more popular and was adopted by Intel for its 64-bit desktop and mobile line. Intel refers to it as was adopted by Intel fir its 64bit desktop and mobile line. Intel refers ti it as EM64T ir Intel 64. The same instruction set is also called x86-64 or 64.
The utilisation of 64-bit CPU features by installing 64-bit operating systems took some time to grow, principally because of the lack of 64-bit frivers for peripheral devices. At this point, it is estimated that about half of the Windows install base is 64-bit.
Cache
A computer stores the data for the programs and files currently open in system memory. The CPU has registers to store instructions and data that it is processing. Instructions are moved in and out of these registers to the system memery.
Cache is a small block of high-speed memory that enhances performance by pre-loading (caching) code and data from relatively slow system memory and passing it to the CPU on demand. Essentially, cache stores instructions and data that the CPU is using regularly.
In early CPU designs, cache was implemented as a separate chip on the motherboard, but almost all new CPUs incorporate most types of cache as features on the CPU itself (on die).
Complex superscalar architecture depends heavily on routines that predict which instructions will be used most and in what sequence. If these instructions are readily available to the control unit, overall throughput is greatly enhanced.