Process diagram to create small pitch wires.
(A) The GaAs/AlGaAs superlattice
(B) after selectively etching the AlGaAs
(C) metal deposition while tilted at 36°
(D) contact of superlattice onto adhesive layer on silicon
(E) release of metal wires by etching GaAs oxide
(F) after optional O2 plasma to remove adhesive layer.
Transfer of the metal wires to a silicon wafer was performed by contacting the metal-coated GaAs/AlGaAs superlattice to a heat-curable epoxy film 10 nm thick, supported on an oxidized silicon wafer; the epoxy served as an adhesion layer. The epoxy was cured at 150°C for 30 min, after which the sample was suspended upside down in a solution of KI (4 g)/I2 (1 g)/H2O (100 ml) to remove the GaAs oxide layer at the nanowire-GaAs interface (5). The silicon wafer was removed, rinsed, and dried. A brief O2 plasma etch effectively removed the residual epoxy layer, if necessary.
which translates the atomic control over the layer thickness of a superlattice into control over the width and spacing of nanowires. Si nanowires made via SNAP inherit their impurity dopant concentrations directly from the single-crystal Si epilayers of the silicon-on-insulator substrates from which they are fabricated
These epilayers were 20- or 35-nm-thick Si(100) films on 150 nm of SiO2, and were p-type impurity (boron) doped using diffusion-based doping