In the early 1990s, the most common hierarchy for personal computers and desktop workstations was for the first-level (L1) cache to be relatively small and located on the same chip as the processor. Lower-level caches were implemented off-chip out of discrete SRAM chips. Capacities of 4 to 16 KB were not unusual in L1 caches, with L2 caches reaching 64 to 256 KB. As the number of transistors that can be fabricated on a chip has increased, additional levels of cache have been moved onto the processor chip. Many current systems have both their first-level and second-level caches on the same chip as the processor, or at least in the same package. Third-level caches are often implemented off-chip, can be multiple megabytes in size, and can be expected to be integrated onto the processor die in the next few years.