Construction and Use of Linear Regression Models for Processor Performance
Analysis
Processor architects have a challenging task of evaluating
a large design space consisting of several interacting
parameters and optimizations. In order to assist architects
in making crucial design decisions, we build linear
regression models that relate processor performance to
micro-architectural parameters, using simulation based experiments.
We obtain good approximate models using an
iterative process in which Akaike’s information criteria is
used to extract a good linear model from a small set of
simulations, and limited further simulation is guided by the
model using D-optimal experimental designs. The iterative
process is repeated until desired error bounds are achieved.
We used this procedure to establish the relationship of the
CPI performance response to 26 key micro-architectural
parameters using a detailed cycle-by-cycle superscalar processor
simulator. The resulting models provide a signifi-
cance ordering on all micro-architectural parameters and
their interactions, and explain the performance variations
of micro-architectural techniques