The second observation for the LC3 design is the extensive use of so–called tri–state buffers connected to a shared bus. An example is the device labelled Gate MARMUX in the upper left corner. The tri–state buffer has an input (16 bits in this case), an output (also 16 bits) and a single bit enable signal that determines if the output is to be forwarded on the bus. If the enable signal is zero, then the output of the device is switched to a high–impedance so–called z value, essentially removing the device from the circuit. If the enable signal is one, then the outputs are a copy of the inputs. Clearly, in the bus–oriented design such as the LC3, only one of the tri–state buffers connected to the bus can be enabled at any one time. In this design, the finite state machine insures that only one of the four tri–state buffers is enabled at any one time.