Decode the instruction and read the registers corresponding to register
source specifiers from the register file. Do the equality test on the registers
as they are read, for a possible branch. Sign-extend the offset field of the
instruction in case it is needed. Compute the possible branch target address
by adding the sign-extended offset to the incremented PC. In an aggressive
implementation, which we explore later, the branch can be completed at the
end of this stage by storing the branch-target address into the PC, if the condition
test yielded true