Synchronous" tells about the behaviour of the DRAM type. In late 1996, SDRAM began to appear in systems. Unlike previous technologies, SDRAM is designed to synchronize itself with the timing of the CPU. This enables the memory controller to know the exact clock cycle when the requested data will be ready, so the CPU no longer has to wait between memory accesses. For example, PC66 SDRAM runs at 66 MT/s, PC100 SDRAM runs at 100 MT/s, PC133 SDRAM runs at 133 MT/s, and so on.
SDRAM can stand for SDR SDRAM (Single Data Rate SDRAM), where the I/O, internal clock and bus clock are the same. For example, the I/O, internal clock and bus clock of PC133 are all 133 Mhz. Single Data Rate means that SDR SDRAM can only read/write one time in a clock cycle. SDRAM have to wait for the completion of the previous command to be able to do another read/write operation.