The design utilises only the configurable logic portion of the FPGA and does not make use of any on-chip-dedicated resources available. The resource utilisation data in terms of the number of LUT–FF pairs used and slices occupied for SPCUs of various sizes are presented in Table 2. The 128- node SPCU occupies only about 38% of the LUT–FF pairs present in the Virtex-5 SX95 T FPGA and could be fitted into a smaller device. Some caution should be exercised while interpreting the FPGA slice usage as all the occupied slices may not be fully utilised (in some cases, only some of the four LUT–FF pairs within a slice may be utilised).