Oscillator Clock Source Select Bit. This bit selects the source for OSCCLK. On XRS low
and after XRS goes high, internal oscillator 1 is selected by default. User would need to
select external oscillator or Internal Oscillator 2 during their initialization process. Whenever
the user changes the clock source, using these bits, the PLLCR register will be
automatically forced to zero. This prevents potential PLL overshoot. The user will then have
to write to the PLLCR register to configure the appropriate divisor ratio. The user can also
configure the PLL lock period using the PLLLOCKPRD register to reduce the lock time if
necessary. If missing clock detect circuit detects a missing clock, then this bit is
automatically forced to 0 and internal oscillator 1 is selected. The PLLCR register will also
be automatically forced to zero to prevent any potential overshoot.