• Dual-core processor chip: Each processor chip includes two identical central
processors (CPs).The CP is a CISC superscalar microprocessor, in which most of
the instructions are hardwired and the rest are executed by vertical microcode.
Each CP includes a 256-KB L1 instruction cache and a 256-KB L1 data cache.
• L2 cache: Each L2 cache contains 32 MB.The L2 caches are arranged in clusters
of five, with each cluster supporting eight processor chips and providing
access to the entire main memory space.
• System control element (SCE): The SCE arbitrates system communication,
and has a central role in maintaining cache coherence.
• Main store control (MSC): The MSCs interconnect the L2 caches and the
main memory.
• Memory card: Each card holds 32 GB of memory.The maximum configurable
memory consists of 8 memory cards for a total of 256 GB. Memory cards interconnect
to the MSC via synchronous memory interfaces (SMIs).
• Memory bus adapter (MBA): The MBA provides an interface to various types
of I/O channels.Traffic to/from the channels goes directly to the L2 cache.