Abstract— In this paper, a reconfigurable power amplifier (PA)
fully integrated in 65-nm CMOS technology, combining
Envelope Tracking (ET) and Power Transistor Switching (PTS)
techniques, and robust to battery depletion is presented. The
main objective of the proposed architecture is to significantly
improve the average efficiency in comparison with a stand-alone
power amplifier at power back-off. A distributed active
transformer (DAT) is also implemented to recombine power
generated by the parallelized power cells which can be turned
on/off in response to the desired output power. Simulations were
conducted in the 3GPP LTE band at 2.535GHz to validate the
proposed implementation. Results show that the proposed
topology provides higher power added efficiency (PAE) and
reduced current consumption at power back-off compared to a
stand-alone PA. The most significant improvement is obtained
at 9 dB back-off from 27.5dBm where PAE is improved by 8%.