This simplest ADC uses a binary counter as the register
“A Start pulse resets the counter & disables the And gate
“With all 0s at its input, the DAC’s output is VAX=0 volts
“Since VAX < VA, the op-amp EOC output will be High
“When Start returns Low, the AND gate is enabled.
“As the counter advances, the DAC output, VAX, increases one step at a time
“This continues until VAX reaches a step that just exceeds
“VA by about VT. EOC is then Low disabling the AND.
“The A/D Conversion is now complete and the contents of the counter are the
digital representation of VA.
“The digital data is lost at the next START pulse