We present two CPU scheduling algorithms, Algorithms
CM-PCS and CS-PCS, that lower the global power budget in a
multicore (or manycore) processor system while creating a
performance gain (and an improvement in performanceenergy metrics) given a task containing a set of processes to be
executed on this system. These algorithms utilize hardware
partitions composed of cpusets containing varying numbers
of cores. The cores are identical, with the exception that cores
belonging to the same cpuset operate at the same frequency,