This paper examines the popular MRU information used by existing way-prediction mechanisms. We show that it is difficult to directly use existing way-prediction on L2 caches. We propose to use another kind of information, namely address affinity to provide accurate location information for L2 cache references. The pro- posed cache design reduces cache access power while improving the performance, compared with a conventional set-associative L2 cache.
The rest of this paper is organized as follows: Section 2 introduces the architecture of the location cache system. Section 3 presents simulation results on access delay and power consumption of the proposed hardware. Section 4 studies the performance and power efficiency of the proposed system. We conclude the paper in
Section 5.