by Eq. (8-5). (a) Determine the peak value of the steady-state current. (b) Using
Eq. (8-1) and assuming zero initial inductor current, determine the maximum
current that occurs during the transient. (c) Simulate the circuit with the PSpice
input file of Fig. 8.4a and compare the results with parts (a) and (b). How many
periods must elapse before the current reaches steady state? How many L/R time
constants elapse before steady state?
8-3. The square-wave inverter of Fig. 8-3 has a dc input of 150 V and supplies a series
RL load with R 20 and L 40 mH. (a) Determine an expression for steadystate
load current. (b) Sketch the load current and indicate the time intervals
when each switch component (Q1, D1; . . . Q4, D4) is conducting. (c) Determine
the peak current in each switch component. (d) What is the maximum voltage
across each switch? Assume ideal components.
8-4. A square-wave inverter has a dc source of 125 V, an output frequency of 60 Hz,
and an RL series load with R 20 and L 25 mH. Determine (a) an
expression for load current, (b) rms load current, and (c) average source current.
8-5. A square-wave inverter has an RL load with R 15 and L 10 mH. The
inverter output frequency is 400 Hz. (a) Determine the value of the dc source
required to establish a load current that has a fundamental frequency component
of 8 A rms. (b) Determine the THD of the load current.
8-6. A square-wave inverter supplies an RL series load with R 25 and L 25 mH.
The output frequency is 120 Hz. (a) Specify the dc source voltage such that the
load current at the fundamental frequency is 2.0 A rms. (b) Verify your results
with PSpice. Determine the THD from PSpice.
8-7. A square-wave inverter has a dc input of 100 V, an output frequency of 60 Hz,
and a series RLC combination with R 10 , L 25 mH, and C 100 F. Use
the PSpice simplified square-wave inverter circuit of Fig. 8-4a to determine the
peak and rms value of the steady-state current. Determine the total harmonic
distortion of the load current. On a printout of one period of the current, indicate
the intervals where each switch component in the inverter circuit of Fig. 8-3 is
conducting for this load if that circuit were used to implement the converter.