IV. I NTEGRATION OF THE ZPU MULTI-C ORE
While in Section III the Dual-ZPU was discussed, we
now want to present how this design is integrated into the
previously outlined classes. Our goal is to present a continuous
flow to students and not to explain every aspect of computer
architecture by means of this example. Instead, a simple
parallel architecture is discussed in detail and later fabricated
and applied as a general purpose processor for embedded
systems.