When the PCI bus was first introduced in the early 1990s, it had a unifying effect on the plethora of I/O buses available on PCs at that time, such as the VESA local bus, EISA, ISA, and Micro Channel, as shown in Figure 1. It was first implemented as a chip-to-chip interconnect and a replacement for the fragmented ISA bus. During these early years, the 33 MHz PCI bus was a good match for the I/O bandwidth requirements of mainstream peripherals. Today, however, the story is quite different. Processor and memory frequencies have increased dramatically, with processor speeds increasing at the most aggressive rate. Over the intervening period, the PCI bus has increased in frequency from 33 to 66 MHz, while processor speeds have increased from 33 MHz to 3 GHz. Emerging I/O technologies such as Gigabit Ethernet and IEEE 1394B can monopolize nearly all of the available PCI bus bandwidth as a single device on the bus