2. Introduction
The Macquarie University Electronics Department and
the CSIRO Division of Telecommunications and
Industrial Physics are developing a high-speed WLAN
[3]. The target of this project is a complete modem in a
single chip by 1998. The current stage of the project calls
for a versatile hardware prototype which can operate at
30 MHz. This prototype will be used to explore
architectural and algorithmic issues, and to characterize
the 5 GHz indoor radio environment.
Software simulations based on radio channel
measurements at 40 GHz led to the development of a
prototype WLAN demodulator architecture. The purpose
of the Pamette demodulator implementation is to validate
and refine parameter choices for 5 GHz operation. A
hardware prototype running in real time is vital to this
requirement because software models do not run fast
enough to take useful amounts of data. For example, to
measure bit error rates of 10-9 requires more than 1010
transmitted bits. On a lightly loaded HP 9000/735
(125 MHz clock speed) it takes longer than 1 hour to