Previous research [6–8] has attempted to use DVFS to improve the energy efficiency of processors by analyzing the way workloads use memory. In the past, a reduction in CPU frequency did not have a significant impact on the performance of workloads with a high miss ratio in the last-level cache (LLC). This is because the processor wastes a large proportion of cycles stalled waiting for the memory-subsystem to provide operands for instructions. Unfortunately, the energy saving benefits of using DVFS are diminishing. In this paper, we will look at several factors infiuencing the effectiveness of DVFS in- cluding: