When using STT-RAM as L1 cache, the main point concerned is access latency. For this issue, we can relax
STT-RAM non-volatility as mentioned. Another point that caught our attention is the STT-RAM write energy
consumption. The number of read and write operations in L1 cache are larger than that in lower level cache, so in order to
reduce the write energy and write latency, improve write performance when using STT-RAM L1 cache, STT-RAM's
non-volatility must be relaxed.