When a circuit is implemented on an FPGA, the place and route tools tend to place only the critical logic close together and spread out other logic.
Further, an FPGA implementation is also sparse since majority of the interconnect is unused.
As a result it is hard to obtain higher power densities.
In our experiments, we noticed that the highest power density was obtained in the MicroBlaze core which was written using hand-placed structural VHDL.