In the event of any abnormality, such as breakdown of transistor Q1 in a short mode, voltage e1 from the secondary coils of transformer T1 is lowered While voltage e2 from the secondary coils of transformer T2 is increased. Consequently, the potential divided voltage Vd becomes equal to or higher than'set voltage VS (i.e. VdéVS), so that comparator CP produces an “H” level signal which represents the abnormality. PWM
circuit 1 operates to turn transistors Q1,Q2 OFF, upon receipt of the “H” level signal from detecting circuit 3, thereby preventing failure of transistor Q1 from ad verselyinfiuencing other circuit elements.