ANALYSIS OF OPERATION
A nonisolated implementation of the boost circuit described
in this paper is shown in Fig. 3. The input side of the circuit
consists of two switches and , two boost inductors and
, and auxiliary transformer ATR. To maximize the voltage
gain of the converter, the output side of the circuit is configured
as a voltage doubler rectifier that consists of boost rectifiers
and and output filter capacitors and connected
across load .
To facilitate the explanation of the circuit operation, Fig. 4
shows a simplified circuit diagram of the circuit in Fig. 3. In
the simplified circuit, auxiliary transformer ATR is modeled as
an ideal transformer with turns ratio and four times
of magnetizing inductance . It should be noted that magnetizing
inductance is the measured inductance across one of
the windings of auxiliary transformer ATR which has an unity
turns ratio. In addition, it is assumed that filter capacitors
Fig. 4. Simplified circuit model of proposed converter that shows reference
directions of currents and voltages.
and are large enough so that the voltage ripple across them
is small compared to their dc voltages. Finally, in this analysis
it is also assumed that all semiconductor components are ideal,
i.e., that they represent zero impedances while in the on state
and infinite impedances while in the off state.
To further facilitate the analysis of operation, Fig. 5 shows
the topological stages of the circuit in Fig. 3 during a switching
cycle, whereas Fig. 6 shows its key waveforms. The reference
directions of currents and voltages plotted in Fig. 6 are shown in
Fig. 4. As can be seen from the timing diagrams of the control
signals for switches and shown in Fig. 6, switches and
conduct simultaneously, i.e., they operates with overlapping
control signals. The time of the simultaneous conduction, defined
from the turn-on moment of one switch until the turn-off
instant of the other switch, represents duty cycle period DTs/2
of the converter, as indicated in Fig. 6.
During the time interval when both switches are on, i.e.,
during the time interval in Fig. 6, inductor currents
and are increasing at the same rate. The rate of change of
and can be calculated from Fig. 5(a), which represents
the equivalent circuit diagram of the converter during the time
interval . Since according to Figs. 4 and 5(a)
 
ANALYSIS OF OPERATIONA nonisolated implementation of the boost circuit describedin this paper is shown in Fig. 3. The input side of the circuitconsists of two switches and , two boost inductors and, and auxiliary transformer ATR. To maximize the voltagegain of the converter, the output side of the circuit is configuredas a voltage doubler rectifier that consists of boost rectifiersand and output filter capacitors and connectedacross load .To facilitate the explanation of the circuit operation, Fig. 4shows a simplified circuit diagram of the circuit in Fig. 3. Inthe simplified circuit, auxiliary transformer ATR is modeled asan ideal transformer with turns ratio and four timesof magnetizing inductance . It should be noted that magnetizinginductance is the measured inductance across one ofthe windings of auxiliary transformer ATR which has an unityturns ratio. In addition, it is assumed that filter capacitorsFig. 4. Simplified circuit model of proposed converter that shows referencedirections of currents and voltages.and are large enough so that the voltage ripple across themis small compared to their dc voltages. Finally, in this analysisit is also assumed that all semiconductor components are ideal,i.e., that they represent zero impedances while in the on stateand infinite impedances while in the off state.To further facilitate the analysis of operation, Fig. 5 showsthe topological stages of the circuit in Fig. 3 during a switchingcycle, whereas Fig. 6 shows its key waveforms. The reference
directions of currents and voltages plotted in Fig. 6 are shown in
Fig. 4. As can be seen from the timing diagrams of the control
signals for switches and shown in Fig. 6, switches and
conduct simultaneously, i.e., they operates with overlapping
control signals. The time of the simultaneous conduction, defined
from the turn-on moment of one switch until the turn-off
instant of the other switch, represents duty cycle period DTs/2
of the converter, as indicated in Fig. 6.
During the time interval when both switches are on, i.e.,
during the time interval in Fig. 6, inductor currents
and are increasing at the same rate. The rate of change of
and can be calculated from Fig. 5(a), which represents
the equivalent circuit diagram of the converter during the time
interval . Since according to Figs. 4 and 5(a)
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