inter- and intra-chip communication [2], [3] resulting to powerful machines with up to 40 Gb/s line-rate capabilities and Tb/s throughput [4]. However, given that HPCS are already entering the Peta-Flops regime [3],
inter- and intra-chip communication [2], [3] resulting to powerfulmachines with up to 40 Gb/s line-rate capabilities andTb/s throughput [4]. However, given that HPCS are alreadyentering the Peta-Flops regime [3],