Figure 4 shows the sequential functional diagram
constructed from the design matrix. Each FR/DP set
corresponds to a stage in the sequential algorithm. The
transition conditions between the stages are represented
by the corresponding process variables. At the same
time, the evolution or progress of the sequence is
recorded by PV222541, which is the status indicator of
the loading step. A higher level program watches the
internal stage of the step and takes corresponding
actions based on the monitoring. The logic flow is
branched into parallel processes, where necessary, and
joined again at an ‘⊗ (AND)’ junction.